MIT PROCESSOR DB

Neil Thompson is the Director of the FutureTech research project at MIT’s Computer Science and Artificial Intelligence Lab and a Principal Investigator at MIT’s Initiative on the Digital Economy.

Previously, he was an Assistant Professor of Innovation and Strategy at the MIT Sloan School of Management, where he co-directed the Experimental Innovation Lab (X-Lab), and a Visiting Professor at the Laboratory for Innovation Science at Harvard. He has advised businesses and government on the future of Moore’s Law, has been on National Academies panels on transformational technologies and scientific reliability, and is part of the Council on Competitiveness’ National Commission on Innovation & Competitiveness Frontiers.

He has a PhD in Business and Public Policy from Berkeley, where he also did Masters degrees in Computer Science and Statistics. He also has a masters in Economics from the London School of Economics, and undergraduate degrees in Physics and International Development. Prior to academia, He worked at organizations such as Lawrence Livermore National Laboratory, Bain and Company, the United Nations, the World Bank, and the Canadian Parliament.

Jonathan Koomey is a researcher, author, lecturer, and entrepreneur who is one of the leading international experts on the economics of climate solutions and the energy and environmental effects of information technology. Dr. Koomey was a lecturer in Earth Systems, School of Earth, Energy, & Environmental Sciences at Stanford University from November 2016 to June 2018, and for four years before that he was a Research Fellow at Stanford’s Steyer-Taylor Center for Energy Policy and Finance. He has also held visiting professorships at Yale University (Fall 2009), Stanford University (2003-4 and Fall 2008), and the University of California, Berkeley’s Energy and Resources Group (Fall 2011). He was a Lecturer in Management at Stanford’s Graduate School of Business in Spring 2013. For more than eleven years he led Lawrence Berkeley National Laboratory’s (LBNL’s) End-Use Forecasting group, which analyzed markets for efficient products and technologies for improving the energy and environmental aspects of those products. The group developed recommendations for policymakers at the U.S. Environmental Protection Agency and the U.S. Department of Energy on ways to promote energy efficiency and prevent pollution. Koomey is also a Research Affiliate of the Energy and Resources Group at the University of California, Berkeley.

Sylvia was a Senior Principal Engineer and AI Architect at Intel and retired in 2023. In her 34 years there, she specialized in inventing, standardizing and bringing new technologies to market. Her expertise includes SoC architecture, process technology, IP design and architecture, system design and software development. Her patents apply to signal integrity, display technologies, power savings, speech recognition and accessible computing. Sylvia is currently focused on sustainable computation for edge applications.

Emanuele received his Ph.D. in Information Technology from Politecnico di Milano in Italy, working at NECSTLab as part of the Computer Architecture group inside Dipartimento di Elettronica, Informazione e Bioingegneria (DEIB). His research interests include designing systems based on reconfigurable architectures to fulfill modern workloads' ever-increasing demand for performance while keeping a relatively low power profile.

Rebecca Wenjing Lyu is a postdoctoral fellow at the MIT Sloan School of Management and at the Initiative on the Digital Economy, MIT. Rebecca’s research focuses on the role of AI, big data, and cloud computing in innovation of firms. Another stream of research of Rebecca’s work is evaluating the contribution of immigrants (entrepreneurs, scientist, etc.) as well as their mobility. Rebecca received her Ph.D. from Tsinghua University (Business Administration).

Andrew is a Webmaster on FutureTech research project at the MIT’s Computer Science and Artificial Intelligence Lab. He holds a bachelor's degree in Software Engineering from the University of Brasília.

João is a Webmaster on FutureTech research project at the MIT’s Computer Science and Artificial Intelligence Lab. He is an Software Engineering undergraduate student from the University of Brasília, Brazil.

Rob Aitken is a Program Manager with the National Advanced Packaging Manufacturing Program, part of the CHIPS R&D Office at the US Department of Commerce, where he is focused on EDA for next generation packaging. Previously, he worked on technology strategy at Synopsys, was an Arm Fellow responsible for technology direction at Arm Research, and worked on various aspects of chip design at Artisan, Agilent, and HP. He was involved in early efforts in design-technology co-optimization, design-for-test/reliability/manufacturability, statistical process variation, emerging memory technology, and secure design for the IoT. He has worked on 15+ Moore's law nodes, holds 50+ US patents and has published over 100 technical papers on a wide range of topics. He holds a Ph.D. from McGill University in Canada. Dr. Aitken is an IEEE Fellow and serves on a number of conference and workshop committees, including Program Co-Chair for Hot Chips 2024.

Daniel Armbrust is co-founder and director of Silicon Catalyst which incubates semiconductor startups. Its portfolio companies have raised more than $0.5B in venture funding and are valued at over $1.9B. Armbrust serves as an advisor, board member, board chairman and angel investor for many semiconductor startups. Daniel is an affiliate with Lawrence Berkeley National Labs and recently was appointed to the Industrial Advisory Committee, which advises the Department of Commerce on the R&D strategy for the CHIPS Act. He served as President and CEO of the SEMATECH semiconductor consortium and held various positions in semiconductor manufacturing and development over 25 years at IBM.

Shekhar Borkar is Sr. Director of Technology at Qualcomm Inc. He started his career with Intel Corp. since 1981, worked on the 8051 family of microcontrollers, supercomputers, high performance, low power digital circuits research, and served as the principal investigator of several DARPA & DOE funded projects. He has authored over 100 peer reviewed publications in conferences and journals, over 60 invited papers and keynotes, five book chapters, and has more than 60 issued patents. Shekhar served as the TPC chairman of VLSI Circuit Symposium in 2002, and as the conference chairman in 2004. Shekhar was an adjunct faculty at Oregon Graduate Institute, and taught a graduate course on VLSI design for more than 10 years. His research interests are low power, high performance digital circuits and system level optimization. Shekhar holds M.Sc. in Physics from University of Bombay in 1979, and MSEE from University of Notre Dame in 1981.

Charles E. Leiserson is Edwin Sibley Webster Professor of Computer Science and Engineering in MIT’s Department of Electrical Engineering and Computer Science (EECS) and a member and former Associate Director of MIT’s Computer Science and Artificial Intelligence Laboratory (CSAIL). He received a B.S. in computer science and mathematics from Yale University in 1975 and a Ph.D. in computer science from Carnegie Mellon University in 1981. He currently serves as the MIT Faculty Director of the DAF-MIT AI Accelerator and leads its Fast AI project. His award-winning research on algorithms, parallel computing, and software performance engineering has been widely deployed in industry. He held the position of Director of System Architecture for the MIT-spinoff Akamai Technologies, and he founded Cilk Arts, Inc., a multicore- software start-up acquired by Intel. He was the network architect for the Connection Machine CM-5, the world’s most powerful computer in 1993. He coauthored the influential textbook Introduction to Algorithms, which has sold over one million copies. Leiserson is a Fellow of four professional societies—ACM, AAAS, SIAM, and IEEE—and he is a member of the National Academy of Engineering.

Bill Maimone has BS and MS degrees from MIT in Computer Science and Engineering, and a BS in Journalism from MIT. Bill's 1986 Masters thesis explored how to make efficient use of multiple CPUs on a single chip well before that became common practice. Though his work shifted after graduation from hardware to software, in each of his industry software positions he worked closely with hardware vendors including Intel, AMD and Nvidia to improve real-world performance and power efficiency. In the past, he's worked at Oracle, Ingres, Anaplan, and Heavy AI.

Joseph Schutz started at Intel in 1981 and developed ten progressively more sophisticated processors through 2005, after which he joined Intel Labs as its director. His expertise spans from device physics to system software.

John Shalf is the Department Head for Computer Science at Lawrence Berkeley National Laboratory. He also formerly served as the Deputy Director for Hardware Technology on the US Department of Energy (DOE)-led Exascale Computing Project (ECP) before he returned to his department head position at LBNL. He has co-authored over 100 peer-reviewed publications in parallel computing software and HPC technology, including the widely cited report “The Landscape of Parallel Computing Research: A View from Berkeley” (with David Patterson and others). He is also the 2024-2027 distinguished lecturer for the IEEE Electronics Packaging Society. Before joining Berkeley Laboratory, John worked at the National Center for Supercomputing Applications and the Max Planck Institute for Gravitation Physics/Albert Einstein Institute (AEI), where he co-created the Cactus Computational Toolkit.

Joshua R. Smith is the Milton and Delia Zeutschel Professor, jointly appointed in the Allen School of Computer Science, and in the Department of Electrical and Computer Engineering at the University of Washington, Seattle. He leads the University of Washington's Amazon Science Hub, a multi-disciplinary research center that supports research in areas of mutual interest to UW and Amazon. He also leads the Sensor Systems lab, which focuses on inventing new sensor systems, devising new ways to power and communicate with them, and developing algorithms for using them. For over twenty years he has been working on battery-free sensing systems that operate using energy harvested from RF signals. This work includes RF energy harvesting, wireless power transfer, and ultra-low power communication. He created the Wireless Identification and Sensing Platform (WISP), an open source platform for research on RF-powered sensing systems. He has also introduced new low power communication techniques, including Ambient Backscatter and communication via Modulated Johnson Noise. Ambient Backscatter systems are often powered by ambient RF signals, and communicate by reflecting those same pre-existing RF signals. His work on WISP and energy harvesting systems led him to begin looking at the historical scaling of the energy efficiency of digital electronics, in order to explain the progress to date on battery-free, energy harvesting systems, as well as make predictions about their future. He is a co-founder with colleagues and former students of Waveworks (formerly Jeeva Wireless), Wibotic, and Proprio. He is a Fellow of the IEEE and a Fellow of the National Academy of Inventors.

Marian Verhelst is a professor at the MICAS lab of KU Leuven and a research director at imec. Her research focuses on embedded machine learning, hardware accelerators, and low-power edge processing. She received a PhD from KU Leuven in 2008, and worked as a research scientist at Intel Labs from 2008 till 2010. Marian is a scientific advisor to multiple startups, member of the board of ECSA, and served in the board of directors of tinyML. She is a science communication enthusiast as an IEEE SSCS Distinguished Lecturer, as a regular member of the Nerdland science podcast (in Dutch), and as the founding mother of KU Leuven’s InnovationLab high school program. Marian received the laureate prize of the Royal Academy of Belgium in 2016, the 2021 Intel Outstanding Researcher Award, and the André Mischke YAE Prize for Science and Policy in 2021.

Jeff is a Senior Fellow at Intel Corporation and leads the team responsible for the architecture, power, performance and power management firmware for all client SOC products. He returned to Intel in 2022 from Apple where he was the Director of Mac System Architecture. Over the course of his 30 year career he has led many innovative SOC and chipset initiatives including the first mobile optimized Centrino platform, the first Atom platform, and the Mac transition to Apple Silicon.